| 摘要 |
A multiplication circuit used for a high speed multiplier in a computer system is basically constituted by a multiplier and a carry propagating adder. The multiplier obtains a sum and carry per each bit by using carry save adder trees having a plurality of carry save adders, and generates a carry generation function and a carry propagation function based on the sum and carry by using a generation/propagation unit. The carry propagating adder obtains a final product based on the carry generation function and carry propagation function, and the carry generation function and carry propagation function generated by the generation/propagation unit are fed back to a final stage of the carry save adder. |
