| 摘要 |
PURPOSE:To reduce the power consumption of a gate at the time of a low capacitive load by switching currents of a current switch while switching emitter follower currents of an ECL gate array according to the load capacity. CONSTITUTION:Terminals 8a and 8b for resistance value switching are provided at the collector side of the current switch part 1 of an ECL circuit, and currents of the current switch part 1 are switched according to the current value of an emitter follower 2. Consequently, when the emitter follower current is small, the current of the current switch 1 is reduced and the power consumption is also reduced. When the load capacity is large, the terminals 8a and 8b and terminals 5a and 5b are short-circuited to shorten a gate delay time, so that the fastness is never spoiled. |
