发明名称 APPARATUS FOR THE MEMORISATION OF LOGIC STATES OF A PROCESS
摘要 <p>Data representative of the state of a process capable of assuming different states is stored in a programmable read only memory having a plurality of unwritten storage locations by writing into memory beginning at an initial address data representative of an initial process state, and thereafter writing subsequent data into the memory beginning at a successive address following the initial address such that a portion of the previously written data forms the subsequent data and such that previously unwritten storage locations between the initial address and the successive address are written so that the contents of such storage locations are all in a first logic state, the contents of all locations following the subsequent data being in an opposite logic state. Data is read from the memory by scanning successive storage locations beginning at the initial address and comparing the contents of consecutive locations to determine the starting address of the data.</p>
申请公布号 EP0039258(B1) 申请公布日期 1985.07.03
申请号 EP19810400432 申请日期 1981.03.20
申请人 COMPAGNIE INTERNATIONALE POUR L'INFORMATIQUE CII - HONEYWELL BULL (DITE CII-HB) 发明人 UGON, MICHEL;HERVE, ROBERT JEAN LOUIS ANTHIME
分类号 G06F11/34;G06F17/40;H03M7/30;(IPC1-7):G06F5/00;G06F15/20 主分类号 G06F11/34
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