发明名称 INFORMATION PROCESSOR
摘要 PURPOSE:To reduce the number of words of branch instruction words read out by an instruction buffer to suppress fetching of fruitless instruction words to the instruction buffer by controlling the capacity of the instruction buffer in response to the number of execution waiting condition branching instructions. CONSTITUTION:An instruction fetch controlling section 32 starts its instruction fetching operation by using an instruction counter 40. Whenever an instruction fetching address is sent to a storage controlling unit through a line 101, ''+1'' is added to the content of the counter 40. A fetched instruction work is written in an instruction buffer 20 through a line 301. This operation is continued until the instruction buffer 20 is filled with fetched instruction words and, when instructions are processed and a vacant area is formed in the buffer 20, instruction words are supplied in the same way. When an instruction word read out by an instruction register 30 is a condition branching instruction, it is informed to the controlling section 32 and condition branching counter 31 through a line 120. The branched address is set in an instruction counter 41.
申请公布号 JPS60123935(A) 申请公布日期 1985.07.02
申请号 JP19830231457 申请日期 1983.12.09
申请人 NIPPON DENKI KK 发明人 YAMAMORI MASAHIKO
分类号 G06F9/38;G06F9/32 主分类号 G06F9/38
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