Signal level comparing circuit

摘要

A signal level comparing circuit includes a comparator operated by a power source voltage and impressed with a reference voltage lower than the power source voltage at a non-inverted input terminal, first and second resistors connected at one end to the inverted input terminal of the comparator. The other end of the second resistor is grounded through an MOS transistor whose gate is connected to the output terminal of the comparator. The signal level comparing circuit further includes a resistor which is connected at one end to the inverted input terminal of the comparator and grounded through an MOS transistor whose gate is connected to the output terminal of the comparator through an inverter.