| 摘要 |
PURPOSE:To prevent malfunction and also high speed operation by constituting a level converting circuit with nine transistors (TR) and two resistors. CONSTITUTION:Series circuits consisting of TRs T11-T13, a resistor R11 and a TRT14, of a TRT15, a resistor R12 and TRs T16, T17 and of TRs T18, T19 are connected in parallel between the highest potential Vcc and the lowest potential Vee. An output of one logic of an ECL logical circuit C1 is connected to a base of the TRT11 and an output of the other logic is connected to a base of the TRT15 respectively. The base of the TRs T12-T14, T16 is connected to each collector respectively. Bases of the TRs T14, T17 and T19 are connected in common. Then the base of the TRT18 is connected to a midpoint of the resistor R12 and the TRT16. Moreover, a signal subjected to level conversion is extracted from a midpoint between the TRs T18 and T19 and inputted to a TTL output circuit. |
