| 摘要 |
PURPOSE:To prevent the malfunction of a logical circuit due to a negative undershoot of an input signal by setting the threshold voltage of a clamping MISFET smaller than the threshold voltages of the MISFETs of the logical circuit constitution of an input circuit. CONSTITUTION:The absolute value of the threshold voltage of the clamping MISFETQ4 is set smaller than those of MISFETs Q1-Q3 constituting the logical circuit. Prevention against a gate breakdown due to a positive high voltage is attained by clamping the voltage to a specific level by the surface breakdown of an FETQ4 and the breakdown of an p-n junction diode D between a drain and a substrate. The threshold voltage of the FETQ4 is small, so it is not clamped for a negative undershoot of the input signal and a transmission gate FETQ1 does not turns on, thereby preventing information stored in the gate of an input FETQ3 from being destroyed.
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