| 摘要 |
PURPOSE:To simplify the constitution of a memory control circuit and to reduce power consumption by driving at least two memories with the output of a switch for write/read addresses. CONSTITUTION:A write address signal (e) produced from a write address generator 4 is set as e=0, e=1, e=2... at time points t0, t1, t2... by a write clock signal (d) supplied from an input terminal 301. The signal obtained by deleting only 2<4> bits out of the signal (e) is supplied in common to memories 2 and 2' as an address signal among control signals (h). While the signal of 2<4> bits is supplied to memories 2 and 2' in common as a write permission signal. Then latch output signals b and b' of latches 1 and 1' are written to memories 2 and 2'. While data can be read out in almost same way as writing with changeover of a switch 6 and extracted through output terminals 201 and 202 as signals c and c' respectively. |
