发明名称 DELAY CIRCUIT
摘要 PURPOSE:To give a delay time required for a gate circuit or the like to the gate circuit by providing a circuit offering time constant change to the input and/or output of the gate circuit so as to reduce number of circuit elements. CONSTITUTION:A cathode of a diode D1 is connected to an output side of a resistor R2. A cathode of a diode D3 is connected to an output side of a resistor R6. Then the input leading/trailing time of the gate circuit G2 depends on a product between a resistance of the resistor R2 and series junction capacitance of the diodes D3, D4. The input leading/trailing time of the gate circuit G3 in the setting state of the time constant as above, the delay time from the input to the output is minimized. In changing the output voltage of a variable resistor RV1 toward 0V, the leading time and the trailing time are increased to increase the delay time between the input and output.
申请公布号 JPS61198912(A) 申请公布日期 1986.09.03
申请号 JP19850039097 申请日期 1985.02.28
申请人 FUJITSU LTD 发明人 KUDO YOICHI;FUJIMIYA JUNICHI
分类号 H03K5/13 主分类号 H03K5/13
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