发明名称 AMPLIFYING CIRCUIT
摘要 PURPOSE:To perform driving at a low source voltage and to improve an S/N ratio by supplying opposite-phase signals to plural mirror circuits, and putting their output currents together into an output signal. CONSTITUTION:The opposite-phase signals obtained from a double balanced type differential amplifier 1 are supplied to the 1st mirror circuits Q8 and Q9, and Q12 and Q13, and the 3rd mirror circuits Q10 and Q11 put output currents of the 1st and the 2nd mirror circuits together. The respective mirror circuits are of the same emitter size, so the output voltage Vout is VREFO+R01.2DELTAI, and the voltage gain is high. Further, the voltage gain at which base noises of transistors (TR) Q8 and Q9 appear in the output voltage is determined by th ratio RL2/RL1 of load resistanced, so it is extremely small and the voltage gain at which base noises of TRs Q10 and Q11, and Q14 and Q15 appear in the output voltage becomes extremely small and the S/N ratio is improved.
申请公布号 JPS60120606(A) 申请公布日期 1985.06.28
申请号 JP19830228414 申请日期 1983.12.05
申请人 HITACHI SEISAKUSHO KK 发明人 IENAKA MASANORI
分类号 H03C1/54;H03D1/22;H03D1/24;H03F3/343;H03F3/45 主分类号 H03C1/54
代理机构 代理人
主权项
地址