发明名称 DATA PROCESSING SYSTEM
摘要 PURPOSE:To prevent invalidation of data caused by mistakes in writing addresses as far as possible and, at the same time, to perform stable transmission of data and correction of erroneous data after transmission, by selecting either the address data at the time of writing in a memory or the output data of an address counter in accordance with a code error detecting means. CONSTITUTION:A data selector 29 selects based on the output of a control circuit 28 whether it determines the write address of 70-word data to an RAM30 in accordance with the output of an internal counter 24 or in accordance with address data sampled at an address sampling circuit 26. Since it is risky to use the address data sampled at the address sampling circuit 26 when the check output of a CRCC (Cyclic Redundancy Check Code) is one corresponding to ''error'', the output of the internal counter 24 is used. By determining the writing address to the RAM30 in accordance with an address value selectively outputted by the selector 29 in such a way, the writing address to the RAM30 can be determined correctly.
申请公布号 JPS60120448(A) 申请公布日期 1985.06.27
申请号 JP19830228689 申请日期 1983.12.02
申请人 CANON KK 发明人 TAKEI MASAHIRO;KOUZUKI SUSUMU;MASUI TOSHIYUKI;HIRASAWA KATAHIDE;KASHIDA MOTOICHI
分类号 G06F12/16;G06F3/06;G06F11/00;G06F11/10;G11B20/18 主分类号 G06F12/16
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