发明名称 INSTRUCTION FETCHING/CHECKING CIRCUIT
摘要 PURPOSE:To reset the operation of a microprocessor immediately when the microprocessor makes a malfunction without waiting T seconds and to execute an instruction execution flow again from the beginning and, at the same time, to output an alarm indicating malfunction. CONSTITUTION:The arranged manner of program instructions which are used by a microprocessor 11 is previously written in a ROM12 for checking as information. A program address read out by the microprocessor 11 is inputted into the ROM12 for checking. The discriminating information of a program corresponding to the address is given to a data selector 13 and a flip flop circuit 14 is driven. ''0'' appears at the terminal J of the flip flop circuit 14 when the microprocessor 11 operates normally, and ''1'' appears when the microprocessor 11 makes a malfunction. At the time of mulfunction, an alarm is outputted and, at the same time, a reset circuit 15 operates and the instruction execution flow is executed from the first.
申请公布号 JPS60120445(A) 申请公布日期 1985.06.27
申请号 JP19830229426 申请日期 1983.12.05
申请人 FUJITSU KK 发明人 TANIGUCHI TAKAYUKI
分类号 G06F11/14;G06F11/00 主分类号 G06F11/14
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