| 摘要 |
PURPOSE:To make the control of data transfer easier and, at the same time, to make high-speed transfer possible, by discriminating the number of the processing byte of plural devices, such as input-output controller, etc., connected with a common bus by means of hardware. CONSTITUTION:A processor CPU designates an input-output control device or main storage device MEM by sending out an address signal to an address bus AB and sends out a confirmation signal to confirmation signal lines SRVI-1 and SRVI-2. Moreover, the CPU sends out 4-byte date to a data bus DB. The designated input-output control device or main storage device MEM informs the processor CPU of the processing byte number of its own device to the confirmation signal through answer signal lines SRVO-1 and SRVO-2. The processor discriminates the processing byte number in accordance with the received answer signal and controls whether the data transfer is one which uses part of the data bus DB or one which uses the whole data bus. |
