| 摘要 |
A depletion mode load device structure is disclosed which improved upon the existing Weinberger layout technique, as applied to enhancement mode/depletion mode circuitry. The structure of an FET, self biased load device includes a single metallized vertical line performing three functions: a source contact for the FET device, the gate electrode for the FET device, and the output line for the circuit for which the device serves as the load. Use of this structure results in an increased horizontal circuit packing density, which is particularly useful in the decoder circuits for a programmed logic array. |
