发明名称 INTEGRATED LOGICAL CIRCUIT WITH BUILT-IN TRACER
摘要 PURPOSE:To dynamically monitor the operating condition inside an integrated circuit without increasing the number of input-output pins of the integrated circuit, by successively storing input-output information and conditional information given from a logical circuit. CONSTITUTION:When an abnormal condition, such as error, etc., occurs in the integrated logical circuit of this invention, the output signal line 106 of a hang- up conditional circuit 5 becomes ''1'' by the output signal line 107 of a combinational logical circuit 10 and writing operation in a temporary storage circuit 1 and the renewal of the contents of an address register 3 by a counter circuit 4 are stopped. After the stoppage, the contents of the temporary storage circuit 1 can be taken out from this integrated logical circuit by operating the shift mode signal of the integrated logical circuit. The internal condition of the logical circuit can be returned to the original condition in this way. The taking-out operation is performed by connecting a device composed of a memory, control circuit, etc., with the integrated logical circuit with a built-in tracer at any time.
申请公布号 JPS60120447(A) 申请公布日期 1985.06.27
申请号 JP19830229519 申请日期 1983.12.05
申请人 NIPPON DENKI KK 发明人 OKUYAMA TADANOBU
分类号 G06F11/267;G06F11/34;H03K19/00 主分类号 G06F11/267
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