发明名称 DATA PROCESSING UNIT
摘要 PURPOSE:To eliminate the need for an external storage means for initial setting by connecting storage elements constituting an shift register according to the connecting mode having a predetermined regularity so as to attain initial setting by the shift operation only. CONSTITUTION:In bringing the level of a -CLEAR signal 13 to 0 and an ALL signal 32 to 1 and an SHIFT signal 22 to 1, a serial-in data 21 goes always to 0 and clocks 33a-33c are fed respectively to all shift registers 20a-20c from a decoder 30. 0 is set to a bit Q0 by the 1st clock. A positive output Q of the bit Q0 is given to an SI terminal of a bit Q1 and 0 is set to a bit Q1 by the 2nd clock. An inverted output Q' of the bit Q1 is given to the SI terminal of a bit Q2 and 1 is set to the bit Q2 by the 3rd clock. 1 is set to a bit Q3 by the 4th clock and 0 is set to a bit Q4 by the 5th clock. Then the idential value is being set to the bits Q0-Q4 respectively and the initial set operation is completed.
申请公布号 JPS60119699(A) 申请公布日期 1985.06.27
申请号 JP19830225803 申请日期 1983.11.30
申请人 NIPPON DENKI KK 发明人 MATSUMOTO HAJIME
分类号 G06F11/22;G11C19/28 主分类号 G06F11/22
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