发明名称 DATA TRANSMISSION SYSTEM
摘要 PURPOSE:To improve a data transmission percentage and to reduce an incorrect receiving percentage in mobile radio communication by detecting a trigger pattern on the receiving side, after a prescribed time, inputting plural words and deciding the majority on the basis of respective corresponding bits dividing the plural words at prescribed intervals. CONSTITUTION:A clock CLK reproduced from a receiving signal is inputted to a trigger pattern detecting circuit 10 to form the reading timing of receiving data RD. The detecting circuit 10 inputs respective bits of the receiving data RD sequentially read out at said timing simply to an 8-bit shift register, and if the shift register is filled with the bits, discharges the older bits successively from the shift register until the 8 bits in the register coincides with the trigger pattern TR. At the time of coincidence, a counter 12 counts the number of clocks CLK. Counting up the number of bits corresponding to one word, a counter 12 outputs a signal S2 to allow a data storage circuit 14 to input the receiving data RD sequentially. Since a TR period repeating the same pattern plural times is regarded as a trigger point and 5 words are inputted unconditionally after an idle time, the receiving percentage is improved.
申请公布号 JPS60119145(A) 申请公布日期 1985.06.26
申请号 JP19830227378 申请日期 1983.12.01
申请人 FUJITSU KK 发明人 OKA NOBUYUKI;TODA YOSHIFUMI
分类号 H04L1/00;H04B7/26;H04L1/08;H04L7/10 主分类号 H04L1/00
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