发明名称 REAL TIME SEQUENCING CIRCUIT
摘要 PURPOSE:To attain sequentially in real time by obtaining a data sequentially in the order of arrangement from each memory. CONSTITUTION:The number of memory circuits M1-M3 is equal to the number of data to be sequenced. A switch means consists of switch circuit S1-S3 and gates G1-G6 and inputs data to a memory by switching a memory output of a pre-state and a memory output of a post-state. A comparator C compares the memory output of the pre-state or the input with each memory output. Moreover, the input of the switch means is switched into the memory output of the pre- state or the input data and the said memory output depending on the result of comparison at the comparator means C. The operation rewriting the memory is performed sequentially by the output of the switch means.
申请公布号 JPS60118929(A) 申请公布日期 1985.06.26
申请号 JP19830227254 申请日期 1983.11.30
申请人 FUJITSU KK 发明人 FURUKAWA TAKAHIRO;IKUTA KOUJI;AOKI SHINICHI;HAYASHI AKIHIRO;TAKAHASHI KAKUJI
分类号 G06F7/02;G06F7/24 主分类号 G06F7/02
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