| 摘要 |
PURPOSE:To check simply an error with high reliability by allowing the vertical parity check to conduct at prescribed time intervals or when an error is detected by the horizontal parity check. CONSTITUTION:In writing a data to a memory 2, the data of the address is read in advance, the read data and an output of a vertical parity register 4b are operated by an EOR circuit 4a, the result is stored again in the register 4b, further the write data and the output of the register 4b are subject to EOR operation once more and the result is stored in the register 4b. Thus, even if the data in the memory 2 is revised, the vertical parity is kept correctly. Moreover, the vertical parity check is conducted by patrolling the memory at a prescribed time interval or when an error is detected by the horizontal parity or at a proper time. |
