| 摘要 |
PURPOSE:To enable to reduce the margin width to the matching deviation at a time when a pad polycrystalline silicon film is connected with a diffusion layer without using a lithography for the connecting of both in the mnaufacturing method of an MIS type semiconductor device and to improve the integration degree of the semiconductor device by a method wherein, when an oxide film on the surface of the diffusion layer formed on the semiconductor substrate is removed, oxide films of a prescribed thickness are made to remain on the surface of a gate electrode. CONSTITUTION:A field oxide film 22 and a gate oxide film 23 are formed on a P type silicon substrate 21, and after a polycrystalline silicon gate electrode 24 was formed on the gate oxide film 23, a drain region 25 and a source region 26 are formed. An oxidation is performed in an oxidizing atmosphere of a high temperature and after an oxide film 27 was grown, a directional etching is performed and the oxide film 27 on the silicon substrate 21 is removed. At this time, an oxide film 27a and oxide films 27b remain on the polycrystalline silicon gate electrode 24. A pad polycrystalline silicon film 28, an oxide film 29 and an Al film 31 are formed. As a connection of the pad polycrystalline silicon film 28 and the drain region 25 can be performed in a self-matching way, the distance L' between the end part 24a of the polycrystalline silicon gate electrode 24 and the end part 22a of the field oxide film 22 can be reduced. |
