发明名称 COINCIDENCE DETECTING CIRCUIT
摘要 PURPOSE:To attain a high-speed operation and reduction of the power consumption with a coincidence detecting circuit by actuating a circuit totally only in case the coincidence is obtained between the state of one of plural bits of data and the prescribed conditions. CONSTITUTION:A sequence control circuit contains a circuit which detects that all output bits of a 16-bit counter are zero. The outputs of counter cells CH0, CH1-CHF are connected to the gates of n channel transistors TRN0, N1- NF respectively. Each source of these TRs is grounded drians connected in common with each other. Then these drains are connected to the drain of a p channel TRPL. This TRPL forms a ratio circuit together with TRN0-NF. The p channel TRPL is turned on only when the upper two bits of a counter circuit are set at 0. Then a current flows to the ratio circuit. In other words, all bits are never set at 0 unless said upper two bits are not zero. Thus it is not needed to flow a current to the ratio circuit.
申请公布号 JPS60117918(A) 申请公布日期 1985.06.25
申请号 JP19830224340 申请日期 1983.11.30
申请人 FUJITSU KK 发明人 MURAKAMI JIYOUJI
分类号 H03K23/58;H03K19/21 主分类号 H03K23/58
代理机构 代理人
主权项
地址