| 摘要 |
PURPOSE:To ensure a satisfactory clamping action regardless of the level of an input signal and also fixing the clamping level at a constant value, by providing charging and discharging circuits at the output and input signal terminal sides respectively of a capacitor connected in series between the input and output signal terminals. CONSTITUTION:In a clamping mode a clamp pulse input terminal 3 is set at a low level and a transistor (TR) 9 is cut off. A TR7 drives with a constant current the common emitter of differential amplifiers TR5 and TR6. TR3 and TR4 set the potential of a point A, i.e., the base of the TR6 at a reference potential Vc to be clamped. When this level Vc is lower than the base potential of the TR5, i.e., the output voltage Vo, the TR6 is cut off with the TR5 turned on. The electric charge of a capacitor C is discharged by the collector current of the TR5, and both base and emitter potensials of a TR2 are reduced to satisfy Vo= Vc. While the TR6 and TR5 are turned on and off respectively with Vo<Vc. Then a current is supplied from a TR3 to charge the capacitor C, and both potentials of the base and the emitter of the TR2 build up to satisfy Vo=Vc. |
