| 摘要 |
PURPOSE:To separate read data into data and clocks by providing a synchronous controller to hold the operation synchronized with read data in a PLL circuit when a data part is read. CONSTITUTION:A function corresponding to a data request signal DRQ of a conventional FDC is attained by a signal DATA AREA of a synchronous controller 20. That is, a PLL circuit 12 holds the operation synchronized with read data DR (sent from a disc device body) in the read operation of a data part. Consequently, read data RD is separated from data (data pulses) and clock pulses WINDOW and is outputted from a data separating circuit 13, and thus, the read operation of the data part is performed surely. |
