发明名称 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE
摘要 PURPOSE:To reduce considerably variance of a threshold in a half-selected cell to for increase the number of times of rewirte, by changing a decoder circuit only slightly. CONSTITUTION:A high potential Vpp for program from a boosting circuit (not shown in a figure) is supplid to decoder circuits DX1, DX2, DY1, and DY2 for control gate, decoder circuits DD1 and DD2 for drain, and a decoder circuit DS for rewrite electrode. When the high potential Vpp for program is selected in the decoder circuit DS for rewrite electrode and is impressed to a rewrite electrode, this potential is dropped by a prescribed potential through MOSFETs Q2 and Q3 constituting a level shifting circuit and is impressed. A MOSFET-Q1 is selected in the write mode to impress a power source potential Vcc to the control gate. In all of decoder circuits DX1, DX2, DY1, and DY2 for control gate, the high potential Vpp for program is impressed to the control gate as it is when this potential is selected by the decoder input.
申请公布号 JPS60117499(A) 申请公布日期 1985.06.24
申请号 JP19830225758 申请日期 1983.11.30
申请人 TOSHIBA KK 发明人 MOMOTOMI MASAKI
分类号 H01L27/112;G11C16/06;G11C17/00;H01L21/8246;H01L21/8247;H01L27/10;H01L29/788;H01L29/792 主分类号 H01L27/112
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