发明名称 REFERENCE BIT SETTING SYSTEM
摘要 PURPOSE:To attain the correct check of a reference bit although no access reaches to a real memory by setting the reference bit when a dynamic address conversion is closed. CONSTITUTION:A dynamic address conversion mechanism DAT10 produces a real address set to a logical address register 4 to use the real address for actual execution of hardware. Therefore a program step PURGE TLB is set as a new program step, and an address conversion buffer TLB9 is invalidated with the execution of said new program step. As a result, a new logical address is converted into a real address by the DAT10 in the next step. When this conversion is over, a bit R is set to a reference bit memory 12.
申请公布号 JPS60117352(A) 申请公布日期 1985.06.24
申请号 JP19830225624 申请日期 1983.11.30
申请人 FUJITSU KK 发明人 IFUKU TETSUHIKO
分类号 G06F12/12;(IPC1-7):G06F12/12 主分类号 G06F12/12
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