发明名称 NORMALIZING CIRCUIT
摘要 PURPOSE:To speed up the operation of a normalizing process by detecting ''1'' closet to a carry bit when the carry bit is added to the most significant bit (MSB) of data, and shifting it at a time so that the MSB is ''1''. CONSTITUTION:A preceeding ''1'' detecting circuit 1 inputs data X generated by adding the carry bit Cb to the MSB of the mantissa part of data to detect ''1'' closet to the carry bit Cb including the Cb, and sends information on that to an encoder 2. The encoder 2 convers the shifting direction and number of times of shifting into codes in binary notation on the basis of the received information. Then, a shifter 3 inputs the data X and shifts the data actually according to the shift information from the encoder 2, generating normalized data Y.
申请公布号 JPS60116032(A) 申请公布日期 1985.06.22
申请号 JP19830223726 申请日期 1983.11.28
申请人 NIPPON DENKI KK 发明人 KUWATA AKIRA;TAKAHASHI TOSHIYA
分类号 G06F7/00;G06F7/74 主分类号 G06F7/00
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