发明名称 FREQUENCY MULTIPLIER FOR DIGITAL SIGNAL
摘要 PURPOSE:To obtain a frequency multiple output having an optional duty ratio by applying an output of a frequency multiplier to an inverting input of an operational amplifier having a negative feedback circuit via an integration circuit and changing a DC voltage fed to a non-inverting input. CONSTITUTION:An input signal A becomes a signal B while being delayed by a phase phi at a delay circuit 2 of a frequency multiplier and a frequency multiple single C after the signals A and B are ORed (3) exclusively. The signal C is applied to the inverting input of an operational amplifier 6 where negative feedback is applied through a resistor 7 as a signal D, and a voltage E is applied from a DC power supply 8 to the non-inverting input of the amplifier 6. Since negative feedback is applied to the amplifier 6, the voltage at the non- inverting input is going to be equal to the voltage E, and a frequency multiple signal F having a duty ratio corresponding to the ratio of the voltage E to a power supply voltage VCC of the amplifier 6 is outputted from the amplifier 6.
申请公布号 JPS60116220(A) 申请公布日期 1985.06.22
申请号 JP19830224993 申请日期 1983.11.28
申请人 MATSUSHITA DENKI SANGYO KK 发明人 TAKAHASHI KIMIYO
分类号 H03K5/00;H03K5/156 主分类号 H03K5/00
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