发明名称 ENVELOPE DETECTING CIRCUIT
摘要 PURPOSE:To give no variance to the output value despite the waveform distortion of an input signal and at the same time to improve the time responsiveness, by sampling and holding the peak voltage value of an input wave for each cycle to perform the envelope detection. CONSTITUTION:When the input signal voltage V1 is lower than the voltage V3 of a capacitor 19, the output of an operational amplifier 17 is saturated toward the minus side with a diode 18 set in a nonconductive state. In this case, a switch 22 is opened and a sample holding circuit 20 is set in a voltage holding state (period A in the figure). The diode 18 conducts when V1>V3 is satisfied, and V3=V1 is obtained by the function of the amplifier 17 (period B). When the V1 exceeds its peak level, the output of the amplifier 17 is reduced. However the V3 of a capacitor 19 is held by the function of the diode 18 (period C). Then the nonconduction state of the diode 18 is detected by a control circuit 23, and the sampling action of the circuit 20 is started. Then the switch 22 is closed to discharge the V3.
申请公布号 JPS60113506(A) 申请公布日期 1985.06.20
申请号 JP19830220640 申请日期 1983.11.25
申请人 HITACHI SEISAKUSHO KK 发明人 SASAKI HIROYASU
分类号 H03D1/00;(IPC1-7):H03D1/00 主分类号 H03D1/00
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