发明名称 MEMORY LSI
摘要 <p>PURPOSE:To make possible bi-directional Read of the longitudinal direction Read and the horizontal direction Read with one kind of a mask ROM, to make low-priced and to improve the performance by incorporating a selection circuit to read the longitudinal direction and the horizontal direction in the memory LSI. CONSTITUTION:The address information inputted through terminals A0-A14 is supplied through an address buffer 31 to a row decoder 32 and a column decorder 330 respectively. If a control signal supplied through a Col terminal is ''true'' and then, the column scanning address driver 331 drives the output of the column decoder 330. On the other hand, the output of a row scanning address driver 332 becomes ''0'' and turns off all the row scanning transfer gates (circle marks) which constructs a selection circuit 333. Reversely, the control signal supplied is ''false'' and then, the output of the driver 331 becomes ''0'', and all the gate of a memory matrix cell 34 are turned off. On the other hand, the driver 332 drives the output of the decoder 330.</p>
申请公布号 JPS60113396(A) 申请公布日期 1985.06.19
申请号 JP19830220712 申请日期 1983.11.25
申请人 TOSHIBA KK 发明人 SATOU KAZUYUKI
分类号 G11C17/00;G06F12/04;G09G5/24;G11C7/00;G11C8/12;H01L27/10 主分类号 G11C17/00
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