发明名称 DETECTING CIRCUIT OF CODE RULE ERROR
摘要 PURPOSE:To obtain a code rule error detecting circuit with excellent characteristic by detecting a binary code in five bits where optional four bits have all identical values and a binary code in five bits where high-order three bits are all identical values. CONSTITUTION:Input terminals T-1, T-2, T-3, T-4 and T-5, a detecting circuit 1 detecting that the high-order three bits are identical codes, a detection circuit 2 detecting that the low-order three bits are identical codes, and a detecting circuit 3 detecting that the high-order two bit and the low-order two bit are identical codes are provided. Furthermore, an OR circuit 4 outputting OR of outputs based on each output of the detection circuits 1, 2 and 3 is provided. The code in five bit satisfying a prescribed code rule is converted into a parallel five bit signal and each bit is fed to the input terminals T-1-T-5. In this case, the bits are set so that the T-1 is set to the most significant bit and the T-5 is the least significant bit.
申请公布号 JPS60111532(A) 申请公布日期 1985.06.18
申请号 JP19830219032 申请日期 1983.11.21
申请人 NIPPON DENKI KK 发明人 SHIYOUJI NOBORU
分类号 G06F11/08;H03M13/00;H03M13/13 主分类号 G06F11/08
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