发明名称 MEMORY ACCESS CONTROL SYSTEM
摘要 PURPOSE:To improve the accessing efficiency to a memory by transmitting immediately the data read out of the memory as long as it is normal and then transmitting the data after correcting it when it is not normal. CONSTITUTION:An access control part 5 of a memory part 3 reads the data D out of a memory 7 through a reading part 8. When a detection part 9 detects an error of the data D, a contrl signal C is produced to start an error correction circuit 10. The circuit 10 corrects the errror of the data D and the produces a control signal C2. A gate part 11 is opend to transfer the control signal to a processor 1 via a common bus 4. When no error is detected by the part 9, the part 9 produces immediately a control signal C3 to open the gate 11 for transfer of data. The read-out transferred immediately as long as it is normal. In such a way, the access efficiency toa memory is improved.
申请公布号 JPS60110057(A) 申请公布日期 1985.06.15
申请号 JP19830217418 申请日期 1983.11.18
申请人 FUJITSU KK 发明人 TANAKA TAKAO
分类号 G06F12/16 主分类号 G06F12/16
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