| 摘要 |
PURPOSE:To change the transfer speed from high to low speed, by storing the first one block in the buffer memory once among consecutive signals transferred from a CPU and alternately inserting each bit of the first block between the bits of the next block. CONSTITUTION:When a serial signal fed from a CPU in the transfer speed of 4M/ /sec is written in the disc in the write-in speed of 4M-bit/sec, the signal is divided into the signal of the 1st and 2nd blocks A, B, and the 1st block A is stored in the buffer memory BMEM with the selector switch SW once. Next, the 2nd block B is fed to a delay circuit DLY through the selection of the switch SW, and an OR gate ORG makes each bit into the arrangement of blocks B, A alternately and it is fed to a write-in head HEAD via an amplifier AMP. Further, the stored bit train is sequentially read out in the speed which is 1/n of the high transmission speed from CPU and transferred to the processor at low speed side in the speed of 1/n. |
