| 摘要 |
PURPOSE:To increase the number of keys by using the output of a sampling frequency changing counter as a key to produce a synchronizing signal. CONSTITUTION:The sound signals are fetched into delay circuits 3 and 3' at the transmission and reception sides according to clocks 13 and 13' and then delivered after the clocks of the same number as the delay stages are supplied. The frequencies of clocks 13 and 13' are changed by control circuits 4 and 4'. The clock frequencies of the transmission side is changed by a variable frequency divider 16, and a synchronizing signal is delivered via a synchronizing signal circuit 6 when a counter 17 has the specific count value. At the reception side a counter 17' is preset by the output of a synchronizing separator circuit 6' and the phase of the clock pulse is synchronized with that of the transmission side. In such a way, the values of counters 17 and 17' can be used as keys. This increases the number of keys. |
