发明名称 BUS SIMULATOR
摘要 PURPOSE:To simulate easily a device to be tested, to return a defective program intentionally and to measure easily a test program by providing a bus simulator with response data setting and automatic returning functions. CONSTITUTION:A test bus 5 is connected to a bus adaptor of a test processor 1 having a test program 2 in which testing contents are written and the bus simulator 7 executing interface control between the bus 5 and the device 6 to be tested is connected to the bus 5. The bus 5 is connected to a bus interface circuit 12 in the simulator 7 and an input buffer register 14 is connected to the circuit 12. A test data display part 24 and a response data setting part 25 are connected to the register 14. A bus interface circuit 19 connected to the bus 5 is connected to the setting part 25 through a response data accumulation buffer 16. The simulator 7 is provided with the response data setting and automatic returning functions to simulate the device 6, so that a defective program is returned intentially and the test program is measured easily.
申请公布号 JPS60108945(A) 申请公布日期 1985.06.14
申请号 JP19830215008 申请日期 1983.11.17
申请人 OKI DENKI KOGYO KK 发明人 MATSUSHITA MASAYOSHI
分类号 G06F13/00;G06F11/26 主分类号 G06F13/00
代理机构 代理人
主权项
地址