| 摘要 |
PURPOSE:To attain access to a main memory of other system with the same protocol as that of a main memory of the own system by using a bus connecting device discriminating priority of a start signal so as to connect memory buses. CONSTITUTION:When a read command from a processing unit 40 to a main memory 39 of other system and a read command from a processing unit 41 to a main memory 38 of other system are transmitted at the same time respectively, a priority discriminating circuit of inter-bus couplers 44, 45 selects any of them. When the processor 40 is selected, the inter-bus coupler 45 returns a retrial signal to the controller 41 to exclude the occupancy of a bus 47 and the coupler 45 itself occupies the bus 47. A read signal on the bus 46 is set to the bus 47 and the main memory 39 is accessed. A data from the main memory 39 is fed to the processor 40 via the bus 47, a linkage bus 48 and the bus 46. |
