发明名称 MANUFACTURE OF CMOSIC (COMPLEMENTARY METAL OXIDE SEMICONDUCTOR INTEGRATED CIRCUIT)
摘要 PURPOSE:To simplify the matching of threshold voltage by a method wherein, after a gate electrode consisting of a gate oxide film and a polycrystalline Si has been formed, impurity ions are implanted into the source and drain region on one MOSFET, which is a conductive type region, and the channel stopper region of the other MOSFET, and said impurity ions are diffused by performing a heat treatment. CONSTITUTION:A P type well region 3 is formed by diffusion on the surface layer part of an N type Si substrate 1, a gate oxide film 10 and a polycrystalline Si layer 11 are coated on the entire surface, a photo-etching is performed on the layer 11, and gate electrodes 11a and 11b consisting of a layer 11 are formed on the region 3 and the other region respectively. Then, a resist mask 61 is coated on the channel stopper region of N-channel MOSFET and the region other than the part which will be turned to the source and drain region of a P- channel MOSFET, and a P type ion implantation layer 5 is formed. Subsequently, the mask 61 is replaced by a mask 62, an N type ion implantation layer 7 is provided, and two FET stopper regions 51 and 71 and source and drain regions 52 and 72 are formed simultaneously by performing a heat treatment.
申请公布号 JPS60107856(A) 申请公布日期 1985.06.13
申请号 JP19830215361 申请日期 1983.11.16
申请人 FUJI DENKI SOUGOU KENKYUSHO:KK 发明人 MATSUZAKI KAZUO
分类号 H01L27/092;H01L21/8238;H01L29/78 主分类号 H01L27/092
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