发明名称 DIGITAL MODULATION SYSTEM
摘要 PURPOSE:To reduce generative probability of direct current at the time of recording and reproducing of parity data by adding some part of parity data to picture data before conversion so as to convert and carry out word inversion. CONSTITUTION:Parity data 2 of A bit are divided by A/J bits, and arranged in the last significant bit of picture data 3 consisting of M bit, thereby constituting complex data of M+A/J bit. The complex data obtained in such a way are converted into record data 5 consisting of M+A/J bit. Thus by scattering the parity data 2 on picture data 1, complex data of M+A/J bit are newly constituted. Continuation of the same code generated in such a conventional system that parity data are continuously arranged can be restricted. As a result, waveform distortion such as a sag produced due to DC interruption can be substantially reduced, and code errors generated during regeneration of signals can be effectively reduced.
申请公布号 JPS60106075(A) 申请公布日期 1985.06.11
申请号 JP19830212354 申请日期 1983.11.14
申请人 HITACHI SEISAKUSHO KK;HITACHI DENSHI KK 发明人 KANEDA HIDEHIRO;MITA SEIICHI;IZUMIDA MORIJI
分类号 G11B20/12;G11B20/18;H04N5/92 主分类号 G11B20/12
代理机构 代理人
主权项
地址