| 摘要 |
PURPOSE:To facilitate to lead wires out from terminals which are not necessarily on a distribution lattice as well as to prevent the enlargement of an chip area, by providing a part or all of the terminals with lead-out wires connected to virtual terminals on the distribution lattice. CONSTITUTION:An LSI function block, consisting of five cells each of which is provided with a transistor portion 32 and of ten terminals 33, is connected to other blocks in such a manner that lead-out wires 35 are connected through virtual terminals 34 to interblock wirings 36 on a distribution lattice 31 having a minimum wiring space smaller than conventional lattices. Since the minimum wiring space is smaller, the distribution lattice 31 does not necessarily correspond with the transistors 32 or terminals 33. For that reason, each terminal 33 is previously led out to the optimal virtual terminal 33 on the distribution lattice by means of the lead-out wire 35. This enables the interblock wiring 36 to be connected to this virtual terminal 34 even when a minimum wiring is small, and a conventional wiring system can be applied thereto without any alteration. |
