发明名称 AMPLIFIER CIRCUIT
摘要 PURPOSE:To obtain a high S/N by constituting the titled amplifier circuit with a summing amplifier and an amplifier group constituted by connecting input/output terminals of plural unit amplifiers in parallel, synthesizing the amplified outputs individually for the same input signal at an output side. CONSTITUTION:n-Set of unit amplifier cells HA1, HA2, HA3,...,HAn are constituted by connecting input/output terminals in parallel respectively and the unit amplifier cells HA1, HA2, HA3,...,HAn amplify a signal voltage respectively given from a terminal A. The amplified signal voltage is synthesized at the output side of the unit amplifier cells HA1, HA2, HA3,...,HAn, amplified by the summing amplifier SA and further amplifier to a prescribed output level by an output amplifier PA. The noise Ni converted to the input of the unit amplifier cells HA1, HA2, HA3,...,HAn is expressed as Ni1, Ni2, Ni3,...,Nin and the noise has a random property independently except a noise component by a common input terminal resistor. Thus, the S/N is improved remarkably.
申请公布号 JPS60103706(A) 申请公布日期 1985.06.08
申请号 JP19830211213 申请日期 1983.11.10
申请人 FUJITSU KK 发明人 KURITA SHIYOUICHI
分类号 H03F3/68;H04B3/36 主分类号 H03F3/68
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