发明名称 |
DECODING AND SELECTION CIRCUIT FOR MONOLITHIC MEMORY |
摘要 |
A word line selection circuit includes a conventional Schottky diode decoder and a driver transistor which is connected to a word line. A word line is selected when the transistor is conductive and all associated diodes of the decoder are off. The base current of the driver transistor is defined by a control transistor whose conductivity is opposite to that of the driver transistor and which applies the selection current to the base of the driver transistor. A regulating transistor forms a current mirror with the control transistor to regulate the selection current. A compensation circuit associated with the regulating transistor modulates the collector current of the regulating transistor as a function of the driver transistor factor. |
申请公布号 |
DE3070584(D1) |
申请公布日期 |
1985.06.05 |
申请号 |
DE19803070584 |
申请日期 |
1980.09.26 |
申请人 |
INTERNATIONAL BUSINESS MACHINES CORPORATION;COMPAGNIE IBM FRANCE |
发明人 |
BOUDON, GERARD;DENIS, BERNARD;DE GRIVEL, VIRGINIE;MOLLIER, PIERRE |
分类号 |
G11C11/41;G11C11/413;G11C11/415;G11C16/08;G11C17/18;(IPC1-7):G11C11/40;G11C11/24;G11C17/00 |
主分类号 |
G11C11/41 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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