| 摘要 |
PURPOSE:To enable to reduce the irregularity of the withstand voltage of a complementary MOSFET and to shorten the steps by introducing one conductive type impurity through all windows, further coating the prescribed windows with a protecting mask, and introducing a large quantity of the other conductive type impurity through the remaining windows. CONSTITUTION:A silicon oxide film 3 of the portion to which P type and N type conductive impurities are implanted is removed by a photosensitive resin film to form windows. When a phosphorus is then implanted to the entire surface of a semiconductor substrate, an N type semiconductor region 17 is formed. Then, the photosensitive resin film 14 is coated on the portion except the windows of the substrate 1 of the portion to become a P type semiconductor region. Then, boron is implanted, an N type semiconductor region 17 is altered to a P type semiconductor region 18 to form a source region 4, a drain region 5 and a channel stopper region 6. Then, a high temperature heat treatment is performed to activate the implanted impurities, thereby obtaining a complementary MOS field effect transistor through the steps of forming a gate insulating film and electrodes. |
