发明名称 Instruction buffer associated with a cache memory unit
摘要 Apparatus and method for providing an improved instruction buffer associated with a cache memory unit. The instruction buffer is utilized to transmit to the control unit of the central processing unit a requested sequence of data groups. In the current invention, the instruction buffer can store two sequences of data groups. The instruction buffer can store the data group sequence for the procedure currently in execution by the data processing unit and can simultaneously store data groups to which transfer, either conditional or unconditional, has been identified in the sequence currently being executed. In addition, the instruction buffer provides signals for use by the central processing unit defining the status of the instruction buffer.
申请公布号 US4521850(A) 申请公布日期 1985.06.04
申请号 US19820433569 申请日期 1982.10.04
申请人 HONEYWELL INFORMATION SYSTEMS INC. 发明人 WILHITE, JOHN E.;SHELLY, WILLIAM A.;RYAN, CHARLES P.
分类号 G06F9/38;(IPC1-7):G06F9/12 主分类号 G06F9/38
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