发明名称 DIGITAL/ANALOG CONVERTER
摘要 PURPOSE:To output repetitively each pulse width modulated wave within a conversion cycle and to improve the linearity of conversion, by using a means which converts the input digital data into the symmetrical pulse width modulated waves different in changing processes of pulse widths. CONSTITUTION:The quantized serial data DSR given from a data input terminal 11 are converted into parallel data D0-D2 by an S/P converter 12 and supplied to an conversion control part 10. The data D0-D2 are processed at the part 10 through a logical circuit containing complement circuits 31 and 32, a counter 42, coincidence circuits 51-54, FF61-63, an OR gate and an AND gate. The part 10 outputs a control pulse P0 obtained by compounding the control pulses symmetrical in change of pulse width. This pulse P0 is supplied to a modulation part 100 consisting of a switch 101, a constant current source 102 and an operational amplifier 103. Then data D0-D2 are converted into symmetrical pulse width modulated waves. These waves are outputted repetitively within a conversion cycle. This improves the linearity of conversion.
申请公布号 JPS60100830(A) 申请公布日期 1985.06.04
申请号 JP19830208107 申请日期 1983.11.05
申请人 SONY KK 发明人 SHIYOUJI NORIO;TAKEDA HITOSHI;ISHIHARA MASAAKI;KATAKURA MASAYUKI
分类号 H03M1/82;(IPC1-7):H03M1/82 主分类号 H03M1/82
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