摘要 |
PURPOSE:To easily make an IC with a monostable multivibrator unnecessary by adding an OR gate, a differentiation circuit and a counter to a PLL circuit. CONSTITUTION:A PLL circuit 8 consists of a phase comparator 4, an LPF 5, a VCO 6 and a frequency dividing circuit 7. An input terminal 11 of a composite synchronizing signal is connected to the 1st input terminal of an OR gate 12, the output terminal of the gate 12 is connected to the comparator 4 and is connected to the input terminal of a differentiation circuit 13. Next, the output of a differentiation circuit 13 is connected to an R terminal of a counter 14 and the output of the counter 14 is connected to the 2nd input terminal of the gate 12. An output terminal 15 of te frequency dividing circuit 7 is connected to the CLK terminal of the counter 14. In this way, since a horizontal synchronizing signal multiplying circuit is formed, a monostable multivibrator becomes unnecessary. Consequently, the IC implementation can be easily performed.
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