| 摘要 |
PURPOSE:To improve an amount of resistance to latch-up, by interposing a resistor between the source electrode of either or both of P-type and N-type transistors, and a substrate electrode or a well electrode. CONSTITUTION:A polysilicon resistor 5 is provided between a P<+> source region 7 and a high-potential source terminal 1, and a polysilicon resistor 14 is provided between an N<+> source region 11 and a low-potential source terminal 4. In other words, polysilicon resistors RDD and RSS are interposed, on an equivalent circuit, between the emitter of a parasitic P-N-P transistor Trp 19 and the high-potential source terminal 1 and between a parasitic N-P-N transistor Trn 22 and the low-potential source terminal 4, respectively. In this case, the condition in which a parasitic thyristor latches up is expressed by the formula, and by selecting the resistance value of the polysilicon resistor RDD or the polysilicon resistor RSS in this formula, an amount of resistance to latch up can be controlled freely. According to this constitution, the amount of resistance to latch-up is improved with the restrictions in layout reduced to a minimum. |
