发明名称 POWER FAILURE DETECTION CIRCUIT
摘要 PURPOSE:To detect power failure quickly and effectively by checking AC voltage rectified directly without being smoothed to detect the time when the voltage drops at the eariest possible time. CONSTITUTION:AC voltage is fed to a power source circuit 14 adapted to concurrently allow the use of an external power source through an terminal 15 as independent power source of individual power failure detection circuits while fed to control blocks 16-1, 16-2... varied in the set comparison voltage or the like by stages without being smoothed via a rectification circuit 1. Then, a comparison circuit 17-1 of the block 16-1 compares the voltage with the reference voltage of a voltage setting circuit 18-1 and thus, the drop in the AC voltage can be detected quickly because of eliminating smoothing. The detection output is applied to a timer circuit 21-1 whose timer time is controlled according to time adjusting elements 22-24 to allow the generation of an interrupt signal PD to CPU and a reset signal for ordering the start or stop of the operation of the CPU at the turning ON or OFF of the power source from a signal generation circuit 25-1. The other blocks 16-2... operate in the same way thereby enabling an effective handling of power failure with a quick detection thereof.
申请公布号 JPS60100057(A) 申请公布日期 1985.06.03
申请号 JP19830207355 申请日期 1983.11.07
申请人 FUJI DENKI SOUGOU KENKYUSHO:KK;FUJI DENKI SEIZO KK 发明人 MARUTA MASARU;HIZAWA MAMORU;ARIMURA KENICHI;KAWASAKI KIKUO
分类号 G01R19/165;H02H3/24 主分类号 G01R19/165
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