| 摘要 |
PURPOSE:To transfer data between memory cells rapidly without extracting data to the outside by adding a pair of a transmission gate connecting a memory cell with a bit line and a word line driving the transmission gate. CONSTITUTION:When transmission gates 24, 27 are opened by actuating a word line 30, a signal of a level (reading ''L'' level) determined by the resistance ratio of a load TR44, the transmission gate 27 and an inverter 23 appears on a bit line 29. A reading ''H'' level signal appears on a bit line 26 by a pull-up TR43. When transmission gates 35, 37 are opened by actuating a word line 39, the level of the bit line 29 is slightly raised by the ''H'' output of an inverter 34. When transmission gates 36, 38 are opened by actuating a word line 40, the reading ''L'' level of a memory cell 32 is reduced as compared to the opening of only a pair of transmission gates 35, 37. |
