发明名称 BEAT PROOF CIRCUIT
摘要 PURPOSE:To prevent the generation of beat by turning on a switching element automatically at the input of a signal having frequency causing beat to a control circuit and connecting a beat proofing reactance to a recording bias oscillation circuit to shear its oscillation frequency. CONSTITUTION:When a frequency synthesizer tuner IC3 tunes up to the frequency causing beat, a memory is previously preset so that an output voltage is outputted from an output terminal (a) of the IC3. The output voltage turns on a transistor (TR) Q1 on the poststage and a capacitor C2 for beat proof is connected in parallel with a capacitor C1 in a recording bias oscillation circuit 2, so that the oscillation frequency is sheared and the beat is prevented. If beat is generated when the IC3 tunes up to another frequency, the memory is preset so that output voltage is outputted from an output terminal (b). Similar operation is applied also to an output terminal (c).
申请公布号 JPS6098509(A) 申请公布日期 1985.06.01
申请号 JP19830206265 申请日期 1983.11.01
申请人 MATSUSHITA DENKI SANGYO KK 发明人 ITOU SHINICHI;INOUE SHIYOUJI
分类号 G11B31/00;G11B5/03 主分类号 G11B31/00
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