发明名称 DATA PROCESSOR
摘要 PURPOSE:To perform control based upon an optional bit position in a word as the boundary of processing by providing a circuit which selects some bit of each word for 2-word data. CONSTITUTION:An external address 02 and a start bit number 03 are inputted to a memory control circuit 01 at an external access request. The control circuit 01 sends an internal read signal 41 to memories 20-27 to output contents of an indicated address (a) or a+1 to a shift register 70. Further, the control circuit 01 generates a clock signal 71 by the previously calculated number of shifts and the register 70 perform bit-by-bit rotation to left synchronously with the clock signal 71. The data in the register 70 is as shown by (b) after being shifted by the specific number of times of shifting, and the contents of the register 70 are sent to an input/output buffer 80 and outputted to a bus 06. The register 70 operates almost similarly even in writing operation.
申请公布号 JPS6097454(A) 申请公布日期 1985.05.31
申请号 JP19830205212 申请日期 1983.11.01
申请人 NIPPON DENKI KK 发明人 KUSAKA YUUKO;OOUCHI MITSUO
分类号 G06F12/06;G06F13/16;G06T1/60 主分类号 G06F12/06
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