发明名称 INFORMATION PROCESSOR
摘要 PURPOSE:To improve the efficiency of software development by debugging a program on such a ''instruction specifying'' basis that trapping is caused when a specific instruction pattern appears. CONSTITUTION:An instruction to be executed is held in an instruction latch 100 and decoded by an instruction decoding unit, and the decoding result is latched in a low-order digit latch 105 when the instruction is the head or in a high-order digit latch 104 when not. At this time, a comparator 108 compares a matching pattern generated according to an instruction pattern register 106 and a mask pattern register 107 with an instruction outputted from the high-order digit latch 104 and low-order digit latch 105. Then a control circuit 1 refers to the coincidence result 109 and flags 110 and 111 indicating whether a trap is caused or not; when the condition of trapping shows that the trapping should be caused right before the instruction execution, an execution unit 13 inhibits the execution and starts the trapping, and when the condition shows that the trapping should be caused right after, the trapping is started after the instruction execution. This operation is carried out until the specific pattern appears.
申请公布号 JPS6097441(A) 申请公布日期 1985.05.31
申请号 JP19830205213 申请日期 1983.11.01
申请人 NIPPON DENKI KK 发明人 YANO YOUICHI
分类号 G06F11/28;G06F11/36 主分类号 G06F11/28
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